1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to an SRAM (Static Random Access Memory) having a multiport.
2. Description of the Background Art
Recently, digital signal processing for processing a large amount of data such as sounds and images at a high speed has been increasingly important with the widespread use of portable terminal equipment. SRAM allowing fast access processing plays an important role as a semiconductor memory device mounted on such portable terminal equipment.
On the other hand, a multiport semiconductor memory device receives attention, which uses each port to allow data reading and writing independently, and SRAM having a multiport has been in increasing demand.
In a dual-port that is a kind of multiport, data writing and reading can be executed simultaneously from two ports.
In the case of SRAM having such a dual-port, however, data writing may be executed on the same row simultaneously, for example. Particularly in this case, a high load may be applied to a memory cell, and thus an input of such a command is exceptionally prohibited in general.
In this respect, Japanese Patent Laying-Open No. 07-141859 discloses a technique for easily detecting simultaneous access to the same row.
However, in the simultaneous access to the same row, although simultaneous data writing on the same row is prohibited, simultaneous data reading can be executed without any trouble.
On the other hand, in designing SRAM memory cells, a static noise margin (also referred to as SNM hereafter) is generally known as a margin index for preventing destruction of data reading.
In an SRAM memory cell with a dual-port described above, two word lines are provided on the same row, where two word lines may simultaneously rise or only one of those word lines may rise. Therefore, it has been necessary to design a margin of an SRAM memory cell in view of SNM, in consideration of both cases.
In this respect, SNM is smaller when two word lines rise simultaneously than when only one word line rises.
Therefore, in order to improve SNM, the SRAM memory cell with a dual port is designed such that SNM is secured by increasing the size of a driver transistor of an N-channel MOS transistor forming an inverter, as compared with an access transistor electrically coupled to a word line on the same row.
Thus, as compared with an SRAM memory cell having a single port, a dual-port SRAM memory cell is disadvantageously increased in cell area as a whole since the number of transistors is increased by two and, in addition, the size of the driver transistor needs to be increased.
Moreover, the increased size of the driver transistor increases leak current during standby.